SIMULATION AND DESIGN OF MICRO-ELECTRONIC PACKAGING[J]. MECHANICS IN ENGINEERING, 2009, 31(2): 1-10. DOI: 10.6052/1000-0879-lxysj2008-575
Citation: SIMULATION AND DESIGN OF MICRO-ELECTRONIC PACKAGING[J]. MECHANICS IN ENGINEERING, 2009, 31(2): 1-10. DOI: 10.6052/1000-0879-lxysj2008-575

SIMULATION AND DESIGN OF MICRO-ELECTRONIC PACKAGING

  • In recent years, the product of semiconductor related technologies tend toward to the direction ofhigh density, high performance, multi-physics and miniaturization characteristics. Furthermore,high reliability, low fabrication cost and time-to-market features are the key elements makingmicroelectronic devices to meet the worldwide highly competitive competition. Facing theaforementioned severe challenges, a new design methodology based on the computer simulationtechnology should be developed to adapt to the new era of ever so various fabrication processes,system integration and next generation electronic packaging devices. Miniaturization inducedtechnology barriers such as process/material uncertainty, structural complexity, high fabricationcost and long development cycles, etc. make conventional design procedure (experiment baseddesign technology, e.g., try-and-error method) inapplicable. Therefore, nowadays, simulationbased design-on-simulation design concept has been widely adopted as the mainstream technologyby worldwide semiconductor related companies and institutions.
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